Mayuresh Surve

|| Namaste! I am Mayuresh Surve ||

Who Am I?

Namaste! I'm Mayuresh Surve, 19, Second-Year Electronics & Telecommunications Engineering student at VJTI, Mumbai. I spend most of my free time exploring Computer Architecture, RTL Design and RL, basically just figuring out how complex systems work under the hood. Right now, that looks like building my own RISC-V CPU Core, diving into RTL design, or tinkering with reinforcement learning and neuromorphic tech. I like making things together — always up to explore , jump into research, and see what kind of cool stuff I can build next.

Interests & Skills

Hardware & Architecture : Computer architecture, RISC-V, RTL Design
AI & Machine Learning : Reinforcement Learning, Deep Learning, Neuromorphic Computing
Languages & Frameworks : Verilog, SystemVerilog, Python, PyTorch, Gymnasium

Currently Working On

RL Based Hardware Prefetchers Using ChampSim
Integrating Systolic Array into CPU Core
Diving deep into Neuromorphic concepts

Projects

Sanganac

A custom 32-bit RISC-V CPU core featuring M-extension and CSR support.

Verilog Computer Architecture RISC-V

Systosim

A systolic array simulator focusing on hardware acceleration and matrix multiplication.

RTL Digital Logic Hardware Acceleration

VeriLIF

An Implementation of Leaky-Integrate And Fire (LIF) Spiking Neural Network Using SystemVerilog.

SystemVerilog SNNs Neuromorphic

Spikerman

Hexapod locomotion control implemented by Reinforcement Learning using Spiking Neural Networks.

PopSAN RL Robotics

PyTorch
Implementations

Implementation of various foundational Deep Learning model architectures using PyTorch.

PyTorch Deep Learning Python

RL
Implementations

Implementation of various RL Algorithms for Gymnasium environments.

Gymnasium RL Algorithms Python

Blogs